Fish bubbling: sin, drank a day's worth of wine yesterday!

RISC Grandmaster pursues the principle that simplicity is beauty, all instructions with similar functions and duplicate features are not allowed, and all instructions of different lengths are deleted, instructions are set to length, and CPU processing priorities are divided according to the usage rate.

If the RISC but the command is a regular army, lean and efficient, then the CISC's command can only be regarded as a copycat.

CISC instructions take the same CPU usage permissions regardless of whether they are important or not, which means that whenever the CPU receives a request, it has to listen to and process it, which greatly reduces efficiency.

Equal-length RISC instructions greatly reduce the complexity of the hardware, and it is possible to implement a very important technology - the pipeline.

When an ordinary computer processes data, it's like a factory where there is only one worker, coming to a task and doing a task until this thing is completed, otherwise you have to wait, wasting a lot of CPU time.

Pipeline technology is to divide a thing into at least two or more steps, RISC is generally divided into 4 to 5, such as taking instructions, execution, output, etc., pipeline is an important design of the core of modern RISC, which greatly improves performance.

For a specific instruction execution process, it can usually be divided into five parts: taking the instruction, decoding the instruction, taking the operand, arithmetic (ALU), and writing the result. The first three steps are usually performed by the command controller, and the last two steps are performed by the combinator.

According to the traditional way, all instructions are executed sequentially, then the instruction controller works first, completes the first three steps of the first instruction, then the combinator works, and after the completion of the two steps, the instruction controller works, and the first three steps of the second instruction are completed, and the combinator completes the last two parts of the second instruction...... Obviously, the combinator is basically resting when the instruction controller is working, and the instruction controller is resting while the combinator is working, resulting in a considerable waste of resources.

The solution is easy to think of, when the command controller has completed the first three steps of the first instruction, it directly starts the operation of the second instruction, and the operation unit is also the same. This results in an assembly line system, which is a 2-stage assembly line.

In this way, the CPU is always in a busy state, this is the principle of the pipeline, although the time to execute an instruction is not reduced, but the time to output the result is reduced a lot, and the theoretical speed is 2 times that of the non-pipeline.

As long as the pipeline continues, the CPU can output results non-stop.

The 757 prototype built by Computation is designed based on this principle, which eliminates the usual two-level microcode control and instead executes a select set of simple instructions and optimized compilers directly in the hardware. This special compiler rearranges the detailed execution steps of the program in order to make more savant use of CPU resources to improve the speed of the program, because it abandons the way of executing microcode for complex instruction systems, which facilitates the execution of a few simple instructions with a hard-wired control system.

Although the reduced instructions are still not used, the idea of flowing water has been embodied, and it seems that there is already a prototype of a modern computer.

Cao Changjiu has been trying to influence Wang Suo to make him accept Risc's ideas, but unfortunately Wang Suo always stumped Chang Chang with many practical problems, leaving him speechless.

Obviously, the advanced ideas and sufficient reasons that had been thought of in advance were easily refuted by the king, not to mention how depressed he was for a long time, so he simply stopped participating in the hardware design work of 757, and only worked as a compiler, so that he could do his own thing.

If the complexity of CISC technology lies in the hardware, it lies in the design and implementation of the processor controller. The complexity of RISC technology lies in the software, in the writing and optimization of compilers.

Cao Changjiu's compilation program effectively made up for the shortcomings of the 757 prototype, and composed the clumsy program into an instruction flow that the pipeline could recognize, so that the 757 prototype stabilized from an ordinary calculation speed of tens of millions of times per second to 25 million times per second. Moreover, limited to the speed limit of the machine, it can not be improved, and can only hope that the 757 will be completely completed.

As a result, Cao Chang had a long no-task time, about three months, and completed most of the logical design work of the CPU of his dream for a long time.

And due to the success of the trial production of the prototype, I used it as a platform for a long time to write a simulator to simulate the actual operation status of the CPU I designed, so as to troubleshoot and improve.

The result is very happy, and after the logical structure of the entire CPU is troubleshooting and corrected, it can already reach the theoretical running speed of tens of millions of times per second.

Of course, this is only theoretical, and if it is made into a finished chip, it will not be able to achieve this state. Moreover, the long-term design is only an 8-bit experimental CPU, and under the existing chip manufacturing process in Huaxia, the finished product can reach millions of times per second, and you must know that Intel's latest 16-bit CPU 8086 only reaches 800,000 times per second.

As for why Cao Changjiu is so confident in his CPU, there is a reason why the manufacturing process does not meet the requirements, and it can only be a fuss about the system architecture.

Unfortunately, the system architecture that Cao Changjiu knows is very mature, and in the era of dreams, the most he has done for a long time is the ARM processor.

When it comes to Intel and AMD, everyone may be familiar with it, because we have a lot of contact with it, the hegemon of the desktop market. But you must know that the X86 series is not the largest in the entire processor market in the world.

The most shipped processor in the world is still ARM, almost all computer-related devices, ARM is everywhere. For example, the mobile phone you use, the router you use, and all the computer-controlled electrical appliances you use, the number is at least ten times that of Intel.

The biggest point of ARM processors is that they are cheap, but they are ...... in performance Anyway, if our computer uses an ARM processor, the program will only run faster and cheaper than Intel.

There is no way to do this, it is determined by the system architecture, ARM processors are almost the earliest RISC processors, and their original 32-bit cores only have 30,000 transistors.

Readers may not know how many transistors are needed to achieve a 32-bit microprocessor, just compare it, the most popular 32-bit CISC microprocessor in the seventies and eighties was Motorola's 68000, which integrated 68,000 transistors with the most advanced technology at the time, which shows how much advantage advanced architecture can achieve.

The first-generation ARM processor only used nearly 30,000 transistors, and the chip area was small, but its performance was more powerful than Intel's 286, and because of the fewer transistors used, it consumed very little power, which can be said to be inexpensive.

It's just a pity that the concept of Risc was put forward too late, or IBM released the personal computer too early, in short, the current personal computer market is dominated by CISC, and people have to use junk X86 architecture cisc processors for a large number of application software.

Cao Changjiu is now thinking that using a more advanced architecture to design and manufacture processors can at least achieve higher performance compared with foreign microprocessors under the existing process conditions in Huaxia, turning the sky upside down.

But how easy is this to say, technology is not everything, there is no guarantee of shipments, how can it become the mainstream, can not become the mainstream, what to talk about.

Cao Changjiu doesn't care about this, because the almost paranoid belief in his dream supports his unprincipled opposition to X86 and writes his own picture in this blank era.

Although the logical design is almost perfect, Cao Changjiu is a software engineer after all, he is not familiar with layout work, such a large-scale layout workload, it can only be a tragedy for him to complete it alone, so he has an idea.